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Support host tracked on LightningJit

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Gabriel A 2024-01-04 17:58:42 -03:00
parent 98c16ed3b0
commit 2feecd05a3
3 changed files with 41 additions and 3 deletions
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21
src/Ryujinx.Cpu/LightningJit/Arm32/Target/Arm64/InstEmitMemory.cs
View File

@ -1126,7 +1126,26 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
Operand destination64 = new(destination.Kind, OperandType.I64, destination.Value); Operand destination64 = new(destination.Kind, OperandType.I64, destination.Value);
Operand basePointer = new(regAlloc.FixedPageTableRegister, RegisterType.Integer, OperandType.I64); Operand basePointer = new(regAlloc.FixedPageTableRegister, RegisterType.Integer, OperandType.I64);
asm.Add(destination64, basePointer, guestAddress); if (mmType == MemoryManagerType.HostTracked)
{
int tempRegister = regAlloc.AllocateTempGprRegister();
Operand pte = new(tempRegister, RegisterType.Integer, OperandType.I64);
asm.Lsr(pte, guestAddress, new Operand(OperandKind.Constant, OperandType.I32, 12));
asm.LdrRr(pte, basePointer, pte, ArmExtensionType.Uxtx, true);
asm.Add(destination64, pte, guestAddress);
regAlloc.FreeTempGprRegister(tempRegister);
}
else if (mmType == MemoryManagerType.HostMapped || mmType == MemoryManagerType.HostMappedUnsafe)
{
asm.Add(destination64, basePointer, guestAddress);
}
else
{
throw new NotImplementedException(mmType.ToString());
}
} }
public static void WriteAddShiftOffset(in Assembler asm, Operand rd, Operand rn, Operand offset, bool add, ArmShiftType shiftType, int shift) public static void WriteAddShiftOffset(in Assembler asm, Operand rd, Operand rn, Operand offset, bool add, ArmShiftType shiftType, int shift)

2
src/Ryujinx.Cpu/LightningJit/Arm64/RegisterAllocator.cs
View File

@ -7,7 +7,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm64
{ {
class RegisterAllocator class RegisterAllocator
{ {
public const int MaxTemps = 1; public const int MaxTemps = 2;
public const int MaxTempsInclFixed = MaxTemps + 2; public const int MaxTempsInclFixed = MaxTemps + 2;
private uint _gprMask; private uint _gprMask;

21
src/Ryujinx.Cpu/LightningJit/Arm64/Target/Arm64/InstEmitMemory.cs
View File

@ -512,7 +512,26 @@ namespace Ryujinx.Cpu.LightningJit.Arm64.Target.Arm64
{ {
Operand basePointer = new(regAlloc.FixedPageTableRegister, RegisterType.Integer, OperandType.I64); Operand basePointer = new(regAlloc.FixedPageTableRegister, RegisterType.Integer, OperandType.I64);
asm.Add(destination, basePointer, guestAddress); if (mmType == MemoryManagerType.HostTracked)
{
int tempRegister = regAlloc.AllocateTempGprRegister();
Operand pte = new(tempRegister, RegisterType.Integer, OperandType.I64);
asm.Lsr(pte, guestAddress, new Operand(OperandKind.Constant, OperandType.I32, 12));
asm.LdrRr(pte, basePointer, pte, ArmExtensionType.Uxtx, true);
asm.Add(destination, pte, guestAddress);
regAlloc.FreeTempGprRegister(tempRegister);
}
else if (mmType == MemoryManagerType.HostMapped || mmType == MemoryManagerType.HostMappedUnsafe)
{
asm.Add(destination, basePointer, guestAddress);
}
else
{
throw new NotImplementedException(mmType.ToString());
}
} }
private static void WriteAddConstant(ref Assembler asm, Operand rd, Operand rn, int value) private static void WriteAddConstant(ref Assembler asm, Operand rd, Operand rn, int value)