More up to date build of the JIT Sparse PR for continued development.
JIT Sparse Function Table was originally developed by riperiperi for the
original Ryujinx project, and decreased the amount of layers in the
Function Table structure, to decrease lookup times at the cost of
slightly higher RAM usage.
This PR rebalances the JIT Sparse Function Table to be a bit more RAM
intensive, but faster in workloads where the JIT Function Table is a
bottleneck. Faster RAM will see a bigger impact and slower RAM (DDR3 and
potentially slow DDR4) will see a slight performance decrease.
This PR also implements a base for a PPTC profile system that could
allow for PPTC with ExeFS mods enabled in the future.
This PR also potentially fixes a strange issue where Avalonia would time
out in some rare instances, e.g. when running ExeFS mods with TotK and a
strange controller configuration.
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Co-authored-by: Evan Husted <gr33m11@gmail.com>
* Add host tracked memory manager mode
* Skipping flush is no longer needed
* Formatting + revert unrelated change
* LightningJit: Ensure that dest register is saved for load ops that do partial updates
* avoid allocations when doing address space lookup
Add missing improvement
* IsRmwMemory -> IsPartialRegisterUpdateMemory
* Ensure we iterate all private allocations in range
* PR feedback and potential fixes
* Simplified bridges a lot
* Skip calling SignalMappingChanged if Guest is true
* Late map bridge too
* Force address masking for prefetch instructions
* Reprotection for bridges
* Move partition list validation to separate debug method
* Move host tracked related classes to HostTracked folder
* New HostTracked namespace
* Move host tracked modes to the end of enum to avoid PPTC invalidation
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Co-authored-by: riperiperi <rhy3756547@hotmail.com>
* Move most of signal handling to Ryujinx.Cpu project
* Format whitespace
* Remove unused member
* Format whitespace
* This does not need to be public anymore
