using Ryujinx.Common.Memory;
using Ryujinx.Graphics.Gpu.Image;
using Ryujinx.Memory;
using Ryujinx.Memory.Range;
using System;
using System.Collections.Generic;
using System.Runtime.CompilerServices;
using System.Runtime.InteropServices;
namespace Ryujinx.Graphics.Gpu.Memory
{
///
/// GPU memory manager.
///
public class MemoryManager : IWritableBlock
{
private const int PtLvl0Bits = 14;
private const int PtLvl1Bits = 14;
public const int PtPageBits = 12;
private const ulong PtLvl0Size = 1UL << PtLvl0Bits;
private const ulong PtLvl1Size = 1UL << PtLvl1Bits;
public const ulong PageSize = 1UL << PtPageBits;
private const ulong PtLvl0Mask = PtLvl0Size - 1;
private const ulong PtLvl1Mask = PtLvl1Size - 1;
public const ulong PageMask = PageSize - 1;
private const int PtLvl0Bit = PtPageBits + PtLvl1Bits;
private const int PtLvl1Bit = PtPageBits;
private const int AddressSpaceBits = PtPageBits + PtLvl1Bits + PtLvl0Bits;
public const ulong PteUnmapped = ulong.MaxValue;
private readonly ulong[][] _pageTable;
public event EventHandler MemoryUnmapped;
private readonly GpuContext _context;
private readonly List _physicalMemoryList;
private readonly Dictionary _physicalMemoryMap;
///
/// Virtual range cache.
///
internal VirtualRangeCache VirtualRangeCache { get; }
///
/// Cache of GPU counters.
///
internal CounterCache CounterCache { get; }
///
/// Creates a new instance of the GPU memory manager.
///
/// GPU context
/// Physical memory that this memory manager will map into
/// The amount of physical CPU Memory Avaiable on the device.
internal MemoryManager(GpuContext context, PhysicalMemory physicalMemory, ulong cpuMemorySize)
{
_context = context;
_physicalMemoryList = new List()
{
physicalMemory
};
_physicalMemoryMap = new Dictionary
{
{ physicalMemory, 0 }
};
VirtualRangeCache = new VirtualRangeCache(this);
CounterCache = new CounterCache();
_pageTable = new ulong[PtLvl0Size][];
MemoryUnmapped += physicalMemory.TextureCache.MemoryUnmappedHandler;
MemoryUnmapped += physicalMemory.BufferCache.MemoryUnmappedHandler;
MemoryUnmapped += VirtualRangeCache.MemoryUnmappedHandler;
MemoryUnmapped += CounterCache.MemoryUnmappedHandler;
physicalMemory.TextureCache.Initialize(cpuMemorySize);
}
///
/// Attaches the memory manager to a new GPU channel.
///
/// Action to be performed when the buffer cache changes
internal void AttachToChannel(Action rebind)
{
PhysicalMemory physicalMemory = GetOwnPhysicalMemory();
physicalMemory.IncrementReferenceCount();
physicalMemory.BufferCache.NotifyBuffersModified += rebind;
physicalMemory.BufferCache.QueuePrune();
}
///
/// Attaches the memory manager to a new GPU channel.
///
/// Action that was performed when the buffer cache changed
internal void DetachFromChannel(Action rebind)
{
PhysicalMemory physicalMemory = GetOwnPhysicalMemory();
physicalMemory.BufferCache.NotifyBuffersModified -= rebind;
physicalMemory.DecrementReferenceCount();
}
///
/// Queues a prune of invalid entries on the buffer cache.
///
internal void QueuePrune()
{
GetOwnPhysicalMemory().BufferCache.QueuePrune();
}
///
/// Reads data from GPU mapped memory.
///
/// Type of the data
/// GPU virtual address where the data is located
/// True if read tracking is triggered on the memory region
/// The data at the specified memory location
public T Read(ulong va, bool tracked = false) where T : unmanaged
{
int size = Unsafe.SizeOf();
if (IsContiguous(va, size))
{
(PhysicalMemory physicalMemory, ulong address) = TranslateWithPhysicalMemory(va);
if (tracked)
{
return physicalMemory.ReadTracked(address);
}
else
{
return physicalMemory.Read(address);
}
}
else
{
Span data = new byte[size];
ReadImpl(va, data, tracked);
return MemoryMarshal.Cast(data)[0];
}
}
///
/// Gets a read-only span of data from GPU mapped memory.
///
/// GPU virtual address where the data is located
/// Size of the data
/// True if read tracking is triggered on the span
/// The span of the data at the specified memory location
public ReadOnlySpan GetSpan(ulong va, int size, bool tracked = false)
{
if (IsContiguous(va, size))
{
(PhysicalMemory physicalMemory, ulong address) = TranslateWithPhysicalMemory(va);
return physicalMemory.GetSpan(address, size, tracked);
}
else
{
Span data = new byte[size];
ReadImpl(va, data, tracked);
return data;
}
}
///
/// Gets a read-only span of data from GPU mapped memory, up to the entire range specified,
/// or the last mapped page if the range is not fully mapped.
///
/// GPU virtual address where the data is located
/// Size of the data
/// True if read tracking is triggered on the span
/// The span of the data at the specified memory location
public ReadOnlySpan GetSpanMapped(ulong va, int size, bool tracked = false)
{
bool isContiguous = true;
int mappedSize;
if (ValidateAddress(va) && IsMappedOnGpuAndPhysical(va))
{
ulong endVa = va + (ulong)size;
ulong endVaAligned = (endVa + PageMask) & ~PageMask;
ulong currentVa = va & ~PageMask;
int pages = (int)((endVaAligned - currentVa) / PageSize);
for (int page = 0; page < pages - 1; page++)
{
ulong nextVa = currentVa + PageSize;
ulong nextPa = Translate(nextVa);
if (!ValidateAddress(nextVa) || !IsMappedOnGpuAndPhysical(nextVa))
{
break;
}
if (Translate(currentVa) + PageSize != nextPa)
{
isContiguous = false;
}
currentVa += PageSize;
}
currentVa += PageSize;
if (currentVa > endVa)
{
currentVa = endVa;
}
mappedSize = (int)(currentVa - va);
}
else
{
return ReadOnlySpan.Empty;
}
if (isContiguous)
{
(PhysicalMemory physicalMemory, ulong address) = TranslateWithPhysicalMemory(va);
return physicalMemory.GetSpan(address, mappedSize, tracked);
}
else
{
Span data = new byte[mappedSize];
ReadImpl(va, data, tracked);
return data;
}
}
///
/// Checks if a page of memory is mapped on the GPU and its backing memory.
///
/// GPU virtual address of the page
/// True if mapped, false otherwise
private bool IsMappedOnGpuAndPhysical(ulong va)
{
(PhysicalMemory physicalMemory, ulong address) = TranslateWithPhysicalMemory(va);
if (address == PteUnmapped)
{
return false;
}
return physicalMemory.IsMapped(address);
}
///
/// Reads data from a possibly non-contiguous region of GPU mapped memory.
///
/// GPU virtual address of the data
/// Span to write the read data into
/// True to enable write tracking on read, false otherwise
private void ReadImpl(ulong va, Span data, bool tracked)
{
if (data.Length == 0)
{
return;
}
int offset = 0, size;
if ((va & PageMask) != 0)
{
(PhysicalMemory physicalMemory, ulong pa) = TranslateWithPhysicalMemory(va);
size = Math.Min(data.Length, (int)PageSize - (int)(va & PageMask));
physicalMemory.GetSpan(pa, size, tracked).CopyTo(data[..size]);
offset += size;
}
for (; offset < data.Length; offset += size)
{
(PhysicalMemory physicalMemory, ulong pa) = TranslateWithPhysicalMemory(va + (ulong)offset);
size = Math.Min(data.Length - offset, (int)PageSize);
physicalMemory.GetSpan(pa, size, tracked).CopyTo(data.Slice(offset, size));
}
}
///
/// Gets a writable region from GPU mapped memory.
///
/// Start address of the range
/// Size in bytes to be range
/// True if write tracking is triggered on the span
/// A writable region with the data at the specified memory location
public WritableRegion GetWritableRegion(ulong va, int size, bool tracked = false)
{
if (IsContiguous(va, size))
{
(PhysicalMemory physicalMemory, ulong address) = TranslateWithPhysicalMemory(va);
return physicalMemory.GetWritableRegion(address, size, tracked);
}
else
{
Memory memory = new byte[size];
GetSpan(va, size).CopyTo(memory.Span);
return new WritableRegion(this, va, memory, tracked);
}
}
///
/// Writes data to GPU mapped memory.
///
/// Type of the data
/// GPU virtual address to write the value into
/// The value to be written
public void Write(ulong va, T value) where T : unmanaged
{
Write(va, MemoryMarshal.Cast(MemoryMarshal.CreateSpan(ref value, 1)));
}
///
/// Writes data to GPU mapped memory.
///
/// GPU virtual address to write the data into
/// The data to be written
public void Write(ulong va, ReadOnlySpan data)
{
WriteImpl(va, data, (physical, va, data) => physical.Write(va, data));
}
///
/// Writes data to GPU mapped memory, destined for a tracked resource.
///
/// GPU virtual address to write the data into
/// The data to be written
public void WriteTrackedResource(ulong va, ReadOnlySpan data)
{
WriteImpl(va, data, (physical, va, data) => physical.WriteTrackedResource(va, data));
}
///
/// Writes data to GPU mapped memory without write tracking.
///
/// GPU virtual address to write the data into
/// The data to be written
public void WriteUntracked(ulong va, ReadOnlySpan data)
{
WriteImpl(va, data, (physical, va, data) => physical.WriteUntracked(va, data));
}
private delegate void WriteCallback(PhysicalMemory physicalMemory, ulong address, ReadOnlySpan data);
///
/// Writes data to possibly non-contiguous GPU mapped memory.
///
/// GPU virtual address of the region to write into
/// Data to be written
/// Write callback
private void WriteImpl(ulong va, ReadOnlySpan data, WriteCallback writeCallback)
{
if (IsContiguous(va, data.Length))
{
(PhysicalMemory physicalMemory, ulong address) = TranslateWithPhysicalMemory(va);
writeCallback(physicalMemory, address, data);
}
else
{
int offset = 0, size;
if ((va & PageMask) != 0)
{
(PhysicalMemory physicalMemory, ulong pa) = TranslateWithPhysicalMemory(va);
size = Math.Min(data.Length, (int)PageSize - (int)(va & PageMask));
writeCallback(physicalMemory, pa, data[..size]);
offset += size;
}
for (; offset < data.Length; offset += size)
{
(PhysicalMemory physicalMemory, ulong pa) = TranslateWithPhysicalMemory(va + (ulong)offset);
size = Math.Min(data.Length - offset, (int)PageSize);
writeCallback(physicalMemory, pa, data.Slice(offset, size));
}
}
}
///
/// Writes data to GPU mapped memory, stopping at the first unmapped page at the memory region, if any.
///
/// GPU virtual address to write the data into
/// The data to be written
public void WriteMapped(ulong va, ReadOnlySpan data)
{
if (IsContiguous(va, data.Length))
{
(PhysicalMemory physicalMemory, ulong address) = TranslateWithPhysicalMemory(va);
physicalMemory.Write(address, data);
}
else
{
int offset = 0, size;
if ((va & PageMask) != 0)
{
(PhysicalMemory physicalMemory, ulong pa) = TranslateWithPhysicalMemory(va);
size = Math.Min(data.Length, (int)PageSize - (int)(va & PageMask));
if (pa != PteUnmapped && physicalMemory.IsMapped(pa))
{
physicalMemory.Write(pa, data[..size]);
}
offset += size;
}
for (; offset < data.Length; offset += size)
{
(PhysicalMemory physicalMemory, ulong pa) = TranslateWithPhysicalMemory(va + (ulong)offset);
size = Math.Min(data.Length - offset, (int)PageSize);
if (pa != PteUnmapped && physicalMemory.IsMapped(pa))
{
physicalMemory.Write(pa, data.Slice(offset, size));
}
}
}
}
///
/// Runs remap actions that are added to an unmap event.
/// These must run after the mapping completes.
///
/// Event with remap actions
private static void RunRemapActions(UnmapEventArgs e)
{
if (e.RemapActions != null)
{
foreach (Action action in e.RemapActions)
{
action();
}
}
}
///
/// Maps a given range of pages to the specified CPU virtual address.
///
///
/// All addresses and sizes must be page aligned.
///
/// CPU virtual address to map into
/// GPU virtual address to be mapped
/// Size in bytes of the mapping
/// Kind of the resource located at the mapping
public void Map(ulong pa, ulong va, ulong size, PteKind kind)
{
MapImpl(pa, va, size, kind);
}
///
/// Maps a given range of pages to the specified CPU virtual address from a different process.
///
///
/// All addresses and sizes must be page aligned.
///
/// CPU virtual address to map into
/// GPU virtual address to be mapped
/// Size in bytes of the mapping
/// Kind of the resource located at the mapping
/// PID of the process that owns the mapping
public void MapForeign(ulong pa, ulong va, ulong size, PteKind kind, ulong ownedPid)
{
if (_context.PhysicalMemoryRegistry.TryGetValue(ownedPid, out PhysicalMemory physicalMemory))
{
MapImpl(pa, va, size, kind, physicalMemory);
}
}
///
/// Maps a given range of pages to the specified CPU virtual address.
///
///
/// All addresses and sizes must be page aligned.
///
/// CPU virtual address to map into
/// GPU virtual address to be mapped
/// Size in bytes of the mapping
/// Kind of the resource located at the mapping
/// Optional physical memory to import for the mapping
private void MapImpl(ulong pa, ulong va, ulong size, PteKind kind, PhysicalMemory physicalMemory = null)
{
lock (_pageTable)
{
UnmapEventArgs e = new(va, size);
MemoryUnmapped?.Invoke(this, e);
byte pIndex = physicalMemory != null ? GetOrAddPhysicalMemory(physicalMemory) : (byte)0;
for (ulong offset = 0; offset < size; offset += PageSize)
{
SetPte(va + offset, PackPte(pa + offset, pIndex, kind));
}
RunRemapActions(e);
}
}
///
/// Unmaps a given range of pages at the specified GPU virtual memory region.
///
/// GPU virtual address to unmap
/// Size in bytes of the region being unmapped
public void Unmap(ulong va, ulong size)
{
lock (_pageTable)
{
// Event handlers are not expected to be thread safe.
UnmapEventArgs e = new(va, size);
MemoryUnmapped?.Invoke(this, e);
for (ulong offset = 0; offset < size; offset += PageSize)
{
SetPte(va + offset, PteUnmapped);
}
RunRemapActions(e);
}
}
///
/// Checks if a region of GPU mapped memory is contiguous.
///
/// GPU virtual address of the region
/// Size of the region
/// True if the region is contiguous, false otherwise
[MethodImpl(MethodImplOptions.AggressiveInlining)]
private bool IsContiguous(ulong va, int size)
{
if (!ValidateAddress(va) || GetPte(va) == PteUnmapped)
{
return false;
}
ulong endVa = (va + (ulong)size + PageMask) & ~PageMask;
va &= ~PageMask;
int pages = (int)((endVa - va) / PageSize);
for (int page = 0; page < pages - 1; page++)
{
ulong nextPte = GetPte(va + PageSize);
if (!ValidateAddress(va + PageSize) || nextPte == PteUnmapped)
{
return false;
}
if (GetPte(va) + PageSize != nextPte)
{
return false;
}
va += PageSize;
}
return true;
}
///
/// Gets the physical regions that make up the given virtual address region.
///
/// Virtual address of the range
/// Size of the range
/// Multi-range with the physical regions
public MultiRange GetPhysicalRegions(ulong va, ulong size)
{
if (IsContiguous(va, (int)size))
{
return new MultiRange(Translate(va), size);
}
ulong regionStart = Translate(va);
ulong regionSize = Math.Min(size, PageSize - (va & PageMask));
ulong endVa = va + size;
ulong endVaRounded = (endVa + PageMask) & ~PageMask;
va &= ~PageMask;
int pages = (int)((endVaRounded - va) / PageSize);
List regions = new();
for (int page = 0; page < pages - 1; page++)
{
ulong currPa = Translate(va);
ulong newPa = Translate(va + PageSize);
if ((currPa != PteUnmapped || newPa != PteUnmapped) && currPa + PageSize != newPa)
{
regions.Add(new MemoryRange(regionStart, regionSize));
regionStart = newPa;
regionSize = 0;
}
va += PageSize;
regionSize += Math.Min(endVa - va, PageSize);
}
if (regions.Count == 0)
{
return new MultiRange(regionStart, regionSize);
}
regions.Add(new MemoryRange(regionStart, regionSize));
return new MultiRange(regions.ToArray());
}
///
/// Checks if a given GPU virtual memory range is mapped to the same physical regions
/// as the specified physical memory multi-range.
///
/// Physical memory multi-range
/// GPU virtual memory address
/// True if the virtual memory region is mapped into the specified physical one, false otherwise
public bool CompareRange(MultiRange range, ulong va)
{
va &= ~PageMask;
for (int i = 0; i < range.Count; i++)
{
MemoryRange currentRange = range.GetSubRange(i);
if (currentRange.Address != PteUnmapped)
{
ulong address = currentRange.Address & ~PageMask;
ulong endAddress = (currentRange.EndAddress + PageMask) & ~PageMask;
while (address < endAddress)
{
if (Translate(va) != address)
{
return false;
}
va += PageSize;
address += PageSize;
}
}
else
{
ulong endVa = va + (((currentRange.Size) + PageMask) & ~PageMask);
while (va < endVa)
{
if (Translate(va) != PteUnmapped)
{
return false;
}
va += PageSize;
}
}
}
return true;
}
///
/// Gets the backing memory for a given GPU virtual address.
///
/// GPU virtual address to get the backing memory from
/// The backing memory for the specified GPU virtual address
internal PhysicalMemory GetBackingMemory(ulong va)
{
ulong pte = GetPte(va);
if (pte == PteUnmapped)
{
return GetOwnPhysicalMemory();
}
return _physicalMemoryList[UnpackPIndexFromPte(pte)];
}
///
/// Gets the backing memory that is owned by this GPU memory manager.
///
/// The backing memory owned by this memory manager
private PhysicalMemory GetOwnPhysicalMemory()
{
return _physicalMemoryList[0];
}
///
/// Gets the index for a given physical memory on the list, adding it to the list if needed.
///
/// Physical memory to get the index from
/// The index of the physical memory on the list
private byte GetOrAddPhysicalMemory(PhysicalMemory physicalMemory)
{
if (!_physicalMemoryMap.TryGetValue(physicalMemory, out byte pIndex))
{
pIndex = checked((byte)_physicalMemoryList.Count);
_physicalMemoryList.Add(physicalMemory);
_physicalMemoryMap.Add(physicalMemory, pIndex);
}
return pIndex;
}
///
/// Validates a GPU virtual address.
///
/// Address to validate
/// True if the address is valid, false otherwise
private static bool ValidateAddress(ulong va)
{
return va < (1UL << AddressSpaceBits);
}
///
/// Checks if a given page is mapped.
///
/// GPU virtual address of the page to check
/// True if the page is mapped, false otherwise
public bool IsMapped(ulong va)
{
return Translate(va) != PteUnmapped;
}
///
/// Translates a GPU virtual address to a CPU virtual address.
///
/// GPU virtual address to be translated
/// CPU virtual address, or if unmapped
public ulong Translate(ulong va)
{
if (!ValidateAddress(va))
{
return PteUnmapped;
}
ulong pte = GetPte(va);
if (pte == PteUnmapped)
{
return PteUnmapped;
}
return UnpackPaFromPte(pte) + (va & PageMask);
}
///
/// Translates a GPU virtual address to a CPU virtual address on the first mapped page of memory
/// on the specified region.
/// If no page is mapped on the specified region, is returned.
///
/// GPU virtual address to be translated
/// Size of the range to be translated
/// CPU virtual address, or if unmapped
public ulong TranslateFirstMapped(ulong va, ulong size)
{
if (!ValidateAddress(va))
{
return PteUnmapped;
}
ulong endVa = va + size;
ulong pte = GetPte(va);
for (; va < endVa && pte == PteUnmapped; va += PageSize - (va & PageMask))
{
pte = GetPte(va);
}
if (pte == PteUnmapped)
{
return PteUnmapped;
}
return UnpackPaFromPte(pte) + (va & PageMask);
}
///
/// Translates a GPU virtual address and returns the number of bytes that are mapped after it.
///
/// GPU virtual address to be translated
/// Maximum size in bytes to scan
/// Number of bytes, 0 if unmapped
public ulong GetMappedSize(ulong va, ulong maxSize)
{
if (!ValidateAddress(va))
{
return 0;
}
ulong startVa = va;
ulong endVa = va + maxSize;
ulong pte = GetPte(va);
while (pte != PteUnmapped && va < endVa)
{
va += PageSize - (va & PageMask);
pte = GetPte(va);
}
return Math.Min(maxSize, va - startVa);
}
///
/// Translates a GPU virtual address to a CPU virtual address and the associated physical memory.
///
/// GPU virtual address to be translated
/// CPU virtual address with the physical memory, or if unmapped
private (PhysicalMemory, ulong) TranslateWithPhysicalMemory(ulong va)
{
if (!ValidateAddress(va))
{
return (GetOwnPhysicalMemory(), PteUnmapped);
}
ulong pte = GetPte(va);
if (pte == PteUnmapped)
{
return (GetOwnPhysicalMemory(), PteUnmapped);
}
return (_physicalMemoryList[UnpackPIndexFromPte(pte)], UnpackPaFromPte(pte) + (va & PageMask));
}
///
/// Gets the kind of a given memory page.
/// This might indicate the type of resource that can be allocated on the page, and also texture tiling.
///
/// GPU virtual address
/// Kind of the memory page
public PteKind GetKind(ulong va)
{
if (!ValidateAddress(va))
{
return PteKind.Invalid;
}
ulong pte = GetPte(va);
if (pte == PteUnmapped)
{
return PteKind.Invalid;
}
return UnpackKindFromPte(pte);
}
public bool IsForeignMapping(ulong va)
{
ulong pte = GetPte(va);
if (pte == PteUnmapped)
{
return false;
}
return UnpackPIndexFromPte(pte) != 0;
}
///
/// Gets the Page Table entry for a given GPU virtual address.
///
/// GPU virtual address
/// Page table entry (CPU virtual address)
private ulong GetPte(ulong va)
{
ulong l0 = (va >> PtLvl0Bit) & PtLvl0Mask;
ulong l1 = (va >> PtLvl1Bit) & PtLvl1Mask;
if (_pageTable[l0] == null)
{
return PteUnmapped;
}
return _pageTable[l0][l1];
}
///
/// Sets a Page Table entry at a given GPU virtual address.
///
/// GPU virtual address
/// Page table entry (CPU virtual address)
private void SetPte(ulong va, ulong pte)
{
ulong l0 = (va >> PtLvl0Bit) & PtLvl0Mask;
ulong l1 = (va >> PtLvl1Bit) & PtLvl1Mask;
if (_pageTable[l0] == null)
{
_pageTable[l0] = new ulong[PtLvl1Size];
for (ulong index = 0; index < PtLvl1Size; index++)
{
_pageTable[l0][index] = PteUnmapped;
}
}
_pageTable[l0][l1] = pte;
}
///
/// Creates a page table entry from a physical address and kind.
///
/// Physical address
/// Index of the physical memory on the list
/// Kind
/// Page table entry
private static ulong PackPte(ulong pa, byte pIndex, PteKind kind)
{
return pa | ((ulong)pIndex << 48) | ((ulong)kind << 56);
}
///
/// Unpacks kind from a page table entry.
///
/// Page table entry
/// Kind
private static PteKind UnpackKindFromPte(ulong pte)
{
return (PteKind)(pte >> 56);
}
///
/// Unpacks the physical memory index in the list from a page table entry.
///
/// Page table entry
/// Physical memory index
private static byte UnpackPIndexFromPte(ulong pte)
{
return (byte)(pte >> 48);
}
///
/// Unpacks physical address from a page table entry.
///
/// Page table entry
/// Physical address
private static ulong UnpackPaFromPte(ulong pte)
{
return pte & 0xffffffffffffUL;
}
}
}