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forked from MeloNX/MeloNX
TSRBerry 9becbd7d72
[Ryujinx.Graphics.Shader] Address dotnet-format issues (#5373)
* dotnet format style --severity info

Some changes were manually reverted.

* Restore a few unused methods and variables

* Silence dotnet format IDE0060 warnings

* Silence dotnet format IDE0052 warnings

* Silence dotnet format IDE0059 warnings

* Address or silence dotnet format CA1069 warnings

* Address or silence dotnet format CA2211 warnings

* Address review comments

* Fix formatting for switch expressions

* Address most dotnet format whitespace warnings

* Apply dotnet format whitespace formatting

A few of them have been manually reverted and the corresponding warning was silenced

* Format if-blocks correctly

* Run dotnet format whitespace after rebase

* Run dotnet format style after rebase

* Run dotnet format whitespace after rebase

* Run dotnet format style after rebase

* Run dotnet format after rebase and remove unused usings

- analyzers
- style
- whitespace

* Disable 'prefer switch expression' rule

* Add comments to disabled warnings

* Fix naming rule violation, Convert shader properties to auto-property and convert values to const

* Simplify properties and array initialization, Use const when possible, Remove trailing commas

* Run dotnet format after rebase

* Address IDE0251 warnings

* Address a few disabled IDE0060 warnings

* Silence IDE0060 in .editorconfig

* Run dotnet format after rebase

* Revert "Simplify properties and array initialization, Use const when possible, Remove trailing commas"

This reverts commit 9462e4136c0a2100dc28b20cf9542e06790aa67e.

* dotnet format whitespace after rebase

* First dotnet format pass

* Fix naming rule violations

* Add trailing commas

* Remove unused members and most unnecessary value assignments

* Remove more unnecessary assignments

* Remove NRE suppressor
2023-06-28 08:59:13 +02:00

167 lines
5.5 KiB
C#

using Ryujinx.Graphics.Shader.Decoders;
using Ryujinx.Graphics.Shader.IntermediateRepresentation;
using Ryujinx.Graphics.Shader.Translation;
using static Ryujinx.Graphics.Shader.Instructions.InstEmitAluHelper;
using static Ryujinx.Graphics.Shader.Instructions.InstEmitHelper;
using static Ryujinx.Graphics.Shader.IntermediateRepresentation.OperandHelper;
namespace Ryujinx.Graphics.Shader.Instructions
{
static partial class InstEmit
{
private const int PT = RegisterConsts.PredicateTrueIndex;
public static void LopR(EmitterContext context)
{
InstLopR op = context.GetOp<InstLopR>();
var srcA = GetSrcReg(context, op.SrcA);
var srcB = GetSrcReg(context, op.SrcB);
EmitLop(context, op.Lop, op.PredicateOp, srcA, srcB, op.Dest, op.DestPred, op.NegA, op.NegB, op.X, op.WriteCC);
}
public static void LopI(EmitterContext context)
{
InstLopI op = context.GetOp<InstLopI>();
var srcA = GetSrcReg(context, op.SrcA);
var srcB = GetSrcImm(context, Imm20ToSInt(op.Imm20));
EmitLop(context, op.LogicOp, op.PredicateOp, srcA, srcB, op.Dest, op.DestPred, op.NegA, op.NegB, op.X, op.WriteCC);
}
public static void LopC(EmitterContext context)
{
InstLopC op = context.GetOp<InstLopC>();
var srcA = GetSrcReg(context, op.SrcA);
var srcB = GetSrcCbuf(context, op.CbufSlot, op.CbufOffset);
EmitLop(context, op.LogicOp, op.PredicateOp, srcA, srcB, op.Dest, op.DestPred, op.NegA, op.NegB, op.X, op.WriteCC);
}
public static void Lop32i(EmitterContext context)
{
InstLop32i op = context.GetOp<InstLop32i>();
var srcA = GetSrcReg(context, op.SrcA);
var srcB = GetSrcImm(context, op.Imm32);
EmitLop(context, op.LogicOp, PredicateOp.F, srcA, srcB, op.Dest, PT, op.NegA, op.NegB, op.X, op.WriteCC);
}
public static void Lop3R(EmitterContext context)
{
InstLop3R op = context.GetOp<InstLop3R>();
var srcA = GetSrcReg(context, op.SrcA);
var srcB = GetSrcReg(context, op.SrcB);
var srcC = GetSrcReg(context, op.SrcC);
EmitLop3(context, op.Imm, op.PredicateOp, srcA, srcB, srcC, op.Dest, op.DestPred, op.X, op.WriteCC);
}
public static void Lop3I(EmitterContext context)
{
InstLop3I op = context.GetOp<InstLop3I>();
var srcA = GetSrcReg(context, op.SrcA);
var srcB = GetSrcImm(context, Imm20ToSInt(op.Imm20));
var srcC = GetSrcReg(context, op.SrcC);
EmitLop3(context, op.Imm, PredicateOp.F, srcA, srcB, srcC, op.Dest, PT, false, op.WriteCC);
}
public static void Lop3C(EmitterContext context)
{
InstLop3C op = context.GetOp<InstLop3C>();
var srcA = GetSrcReg(context, op.SrcA);
var srcB = GetSrcCbuf(context, op.CbufSlot, op.CbufOffset);
var srcC = GetSrcReg(context, op.SrcC);
EmitLop3(context, op.Imm, PredicateOp.F, srcA, srcB, srcC, op.Dest, PT, false, op.WriteCC);
}
private static void EmitLop(
EmitterContext context,
LogicOp logicOp,
PredicateOp predOp,
Operand srcA,
Operand srcB,
int rd,
int destPred,
bool invertA,
bool invertB,
bool extended,
bool writeCC)
{
srcA = context.BitwiseNot(srcA, invertA);
srcB = context.BitwiseNot(srcB, invertB);
Operand res = logicOp switch
{
LogicOp.And => context.BitwiseAnd(srcA, srcB),
LogicOp.Or => context.BitwiseOr(srcA, srcB),
LogicOp.Xor => context.BitwiseExclusiveOr(srcA, srcB),
_ => srcB,
};
EmitLopPredWrite(context, res, predOp, destPred);
context.Copy(GetDest(rd), res);
SetZnFlags(context, res, writeCC, extended);
}
private static void EmitLop3(
EmitterContext context,
int truthTable,
PredicateOp predOp,
Operand srcA,
Operand srcB,
Operand srcC,
int rd,
int destPred,
bool extended,
bool writeCC)
{
Operand res = Lop3Expression.GetFromTruthTable(context, srcA, srcB, srcC, truthTable);
EmitLopPredWrite(context, res, predOp, destPred);
context.Copy(GetDest(rd), res);
SetZnFlags(context, res, writeCC, extended);
}
private static void EmitLopPredWrite(EmitterContext context, Operand result, PredicateOp predOp, int pred)
{
if (pred != RegisterConsts.PredicateTrueIndex)
{
Operand pRes;
if (predOp == PredicateOp.F)
{
pRes = Const(IrConsts.False);
}
else if (predOp == PredicateOp.T)
{
pRes = Const(IrConsts.True);
}
else if (predOp == PredicateOp.Z)
{
pRes = context.ICompareEqual(result, Const(0));
}
else /* if (predOp == Pop.Nz) */
{
pRes = context.ICompareNotEqual(result, Const(0));
}
context.Copy(Register(pred, RegisterType.Predicate), pRes);
}
}
}
}