Auto-format

src/Ryujinx.Cpu/Jit/JitCpuContext.cs

@@ -1,4 +1,4 @@
-using ARMeilleure.Memory;
+using ARMeilleure.Memory;
 using ARMeilleure.Translation;
 
 namespace Ryujinx.Cpu.Jit

src/Ryujinx.Cpu/LightningJit/AarchCompiler.cs

@@ -29,4 +29,4 @@ namespace Ryujinx.Cpu.LightningJit
             }
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/AddressForm.cs

@@ -15,4 +15,4 @@ namespace Ryujinx.Cpu.LightningJit
         StructNoOffset,
         StructPostIndexedReg,
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm32/A32Compiler.cs

@@ -1,6 +1,6 @@
 using ARMeilleure.Common;
-using Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64;
 using ARMeilleure.Memory;
+using Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64;
 using System;
 using System.Runtime.InteropServices;
 
@@ -27,4 +27,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm32
             }
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm32/Block.cs

@@ -98,4 +98,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm32
             }
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm32/BranchType.cs

@@ -12,4 +12,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm32
         SoftwareInterrupt,
         ReadCntpct,
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm32/CodeGenContext.cs

@@ -19,7 +19,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm32
         private InstInfo _nextInstruction;
         private bool _skipNextInstruction;
 
-        private ArmCondition[] _itConditions;
+        private readonly ArmCondition[] _itConditions;
         private int _itCount;
 
         private readonly List<PendingBranch> _pendingBranches;
@@ -191,4 +191,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm32
             return modified;
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm32/Decoder.cs

@@ -1,6 +1,6 @@
+using ARMeilleure.Memory;
 using Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64;
 using Ryujinx.Cpu.LightningJit.CodeGen.Arm64;
-using ARMeilleure.Memory;
 using System.Collections.Generic;
 using System.Diagnostics;
 
@@ -543,4 +543,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm32
             return false;
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm32/IInstEmit.cs

@@ -1228,4 +1228,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm32
         static abstract void YieldT1(CodeGenContext context, uint encoding);
         static abstract void YieldT2(CodeGenContext context, uint encoding);
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm32/ImmUtils.cs

@@ -134,4 +134,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm32
             return (int)(encoding << 21) >> 20;
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm32/InstFlags.cs

@@ -61,4 +61,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm32
         CondRlistRead = Cond | Rlist | ReadRd,
         CondRlistReadWBack = Cond | Rlist | ReadRd | WBack,
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm32/InstInfo.cs

@@ -17,4 +17,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm32
             Flags = flags;
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm32/InstInfoForTable.cs

@@ -76,4 +76,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm32
             return false;
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm32/InstMeta.cs

@@ -19,4 +19,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm32
             Flags = flags;
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm32/InstName.cs

@@ -559,4 +559,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm32
             return name.IsSystem() || name.IsCall();
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm32/InstTableA32.cs

@@ -1191,4 +1191,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm32
             return new(InstName.Udf, T.UdfA1, IsaVersion.v80, IsaFeature.None, InstFlags.None);
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm32/InstTableT16.cs

@@ -143,4 +143,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm32
             return false;
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm32/InstTableT32.cs

@@ -1209,4 +1209,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm32
             return false;
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm32/MultiBlock.cs

@@ -28,4 +28,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm32
             IsTruncated = block.IsTruncated;
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm32/PendingBranch.cs

@@ -17,4 +17,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm32
             WriterPointer = writerPointer;
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm32/RegisterAllocator.cs

@@ -166,4 +166,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm32
             mask &= ~(1u << index);
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm32/RegisterUtils.cs

@@ -106,4 +106,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm32
             return (int)(encoding >> RdRt2RdHiT32Bit) & 0xf;
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm32/ScopedRegister.cs

@@ -3,7 +3,7 @@ using System;
 
 namespace Ryujinx.Cpu.LightningJit.Arm32
 {
-    struct ScopedRegister : IDisposable
+    readonly struct ScopedRegister : IDisposable
     {
         private readonly RegisterAllocator _registerAllocator;
         private readonly Operand _operand;
@@ -36,4 +36,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm32
             }
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm32/Target/Arm64/Compiler.cs

@@ -1,7 +1,7 @@
 using ARMeilleure.Common;
+using ARMeilleure.Memory;
 using Ryujinx.Cpu.LightningJit.CodeGen;
 using Ryujinx.Cpu.LightningJit.CodeGen.Arm64;
-using ARMeilleure.Memory;
 using System;
 using System.Collections.Generic;
 using System.Diagnostics;

src/Ryujinx.Cpu/LightningJit/Arm32/Target/Arm64/InstEmit.cs

@@ -515,7 +515,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
 
         public static void ClrbhbA1(CodeGenContext context, uint encoding)
         {
-            InstCondb28w4 inst = new(encoding);
+            _ = new InstCondb28w4(encoding);
 
             throw new NotImplementedException();
         }
@@ -2546,14 +2546,14 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
 
         public static void SetpanA1(CodeGenContext context, uint encoding)
         {
-            InstImm1b9w1 inst = new(encoding);
+            _ = new InstImm1b9w1(encoding);
 
             throw new NotImplementedException();
         }
 
         public static void SetpanT1(CodeGenContext context, uint encoding)
         {
-            InstImm1b19w1 inst = new(encoding);
+            _ = new InstImm1b19w1(encoding);
 
             throw new NotImplementedException();
         }
@@ -4726,14 +4726,14 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
 
         public static void VcaddA1(CodeGenContext context, uint encoding)
         {
-            InstRotb24w1Db22w1Sb20w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4 inst = new(encoding);
+            _ = new InstRotb24w1Db22w1Sb20w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4(encoding);
 
             throw new NotImplementedException();
         }
 
         public static void VcaddT1(CodeGenContext context, uint encoding)
         {
-            InstRotb24w1Db22w1Sb20w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4 inst = new(encoding);
+            _ = new InstRotb24w1Db22w1Sb20w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4(encoding);
 
             throw new NotImplementedException();
         }
@@ -4922,28 +4922,28 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
 
         public static void VcmlaA1(CodeGenContext context, uint encoding)
         {
-            InstRotb23w2Db22w1Sb20w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4 inst = new(encoding);
+            _ = new InstRotb23w2Db22w1Sb20w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4(encoding);
 
             throw new NotImplementedException();
         }
 
         public static void VcmlaT1(CodeGenContext context, uint encoding)
         {
-            InstRotb23w2Db22w1Sb20w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4 inst = new(encoding);
+            _ = new InstRotb23w2Db22w1Sb20w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4(encoding);
 
             throw new NotImplementedException();
         }
 
         public static void VcmlaSA1(CodeGenContext context, uint encoding)
         {
-            InstSb23w1Db22w1Rotb20w2Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4 inst = new(encoding);
+            _ = new InstSb23w1Db22w1Rotb20w2Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4(encoding);
 
             throw new NotImplementedException();
         }
 
         public static void VcmlaST1(CodeGenContext context, uint encoding)
         {
-            InstSb23w1Db22w1Rotb20w2Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4 inst = new(encoding);
+            _ = new InstSb23w1Db22w1Rotb20w2Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4(encoding);
 
             throw new NotImplementedException();
         }
@@ -5068,14 +5068,14 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
 
         public static void VcvtbBfsA1(CodeGenContext context, uint encoding)
         {
-            InstCondb28w4Db22w1Vdb12w4Mb5w1Vmb0w4 inst = new(encoding);
+            _ = new InstCondb28w4Db22w1Vdb12w4Mb5w1Vmb0w4(encoding);
 
             throw new NotImplementedException();
         }
 
         public static void VcvtbBfsT1(CodeGenContext context, uint encoding)
         {
-            InstDb22w1Vdb12w4Mb5w1Vmb0w4 inst = new(encoding);
+            _ = new InstDb22w1Vdb12w4Mb5w1Vmb0w4(encoding);
 
             throw new NotImplementedException();
         }
@@ -5200,28 +5200,28 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
 
         public static void VcvttBfsA1(CodeGenContext context, uint encoding)
         {
-            InstCondb28w4Db22w1Vdb12w4Mb5w1Vmb0w4 inst = new(encoding);
+            _ = new InstCondb28w4Db22w1Vdb12w4Mb5w1Vmb0w4(encoding);
 
             throw new NotImplementedException();
         }
 
         public static void VcvttBfsT1(CodeGenContext context, uint encoding)
         {
-            InstDb22w1Vdb12w4Mb5w1Vmb0w4 inst = new(encoding);
+            _ = new InstDb22w1Vdb12w4Mb5w1Vmb0w4(encoding);
 
             throw new NotImplementedException();
         }
 
         public static void VcvtBfsA1(CodeGenContext context, uint encoding)
         {
-            InstDb22w1Vdb12w4Mb5w1Vmb0w4 inst = new(encoding);
+            _ = new InstDb22w1Vdb12w4Mb5w1Vmb0w4(encoding);
 
             throw new NotImplementedException();
         }
 
         public static void VcvtBfsT1(CodeGenContext context, uint encoding)
         {
-            InstDb22w1Vdb12w4Mb5w1Vmb0w4 inst = new(encoding);
+            _ = new InstDb22w1Vdb12w4Mb5w1Vmb0w4(encoding);
 
             throw new NotImplementedException();
         }
@@ -5344,28 +5344,28 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
 
         public static void VdotA1(CodeGenContext context, uint encoding)
         {
-            InstDb22w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4 inst = new(encoding);
+            _ = new InstDb22w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4(encoding);
 
             throw new NotImplementedException();
         }
 
         public static void VdotT1(CodeGenContext context, uint encoding)
         {
-            InstDb22w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4 inst = new(encoding);
+            _ = new InstDb22w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4(encoding);
 
             throw new NotImplementedException();
         }
 
         public static void VdotSA1(CodeGenContext context, uint encoding)
         {
-            InstDb22w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4 inst = new(encoding);
+            _ = new InstDb22w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4(encoding);
 
             throw new NotImplementedException();
         }
 
         public static void VdotST1(CodeGenContext context, uint encoding)
         {
-            InstDb22w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4 inst = new(encoding);
+            _ = new InstDb22w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4(encoding);
 
             throw new NotImplementedException();
         }
@@ -5456,56 +5456,56 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
 
         public static void VfmalA1(CodeGenContext context, uint encoding)
         {
-            InstDb22w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4 inst = new(encoding);
+            _ = new InstDb22w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4(encoding);
 
             throw new NotImplementedException();
         }
 
         public static void VfmalT1(CodeGenContext context, uint encoding)
         {
-            InstDb22w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4 inst = new(encoding);
+            _ = new InstDb22w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4(encoding);
 
             throw new NotImplementedException();
         }
 
         public static void VfmalSA1(CodeGenContext context, uint encoding)
         {
-            InstDb22w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4 inst = new(encoding);
+            _ = new InstDb22w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4(encoding);
 
             throw new NotImplementedException();
         }
 
         public static void VfmalST1(CodeGenContext context, uint encoding)
         {
-            InstDb22w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4 inst = new(encoding);
+            _ = new InstDb22w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4(encoding);
 
             throw new NotImplementedException();
         }
 
         public static void VfmaBfA1(CodeGenContext context, uint encoding)
         {
-            InstDb22w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4 inst = new(encoding);
+            _ = new InstDb22w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4(encoding);
 
             throw new NotImplementedException();
         }
 
         public static void VfmaBfT1(CodeGenContext context, uint encoding)
         {
-            InstDb22w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4 inst = new(encoding);
+            _ = new InstDb22w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4(encoding);
 
             throw new NotImplementedException();
         }
 
         public static void VfmaBfsA1(CodeGenContext context, uint encoding)
         {
-            InstDb22w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4 inst = new(encoding);
+            _ = new InstDb22w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4(encoding);
 
             throw new NotImplementedException();
         }
 
         public static void VfmaBfsT1(CodeGenContext context, uint encoding)
         {
-            InstDb22w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4 inst = new(encoding);
+            _ = new InstDb22w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4(encoding);
 
             throw new NotImplementedException();
         }
@@ -5540,28 +5540,28 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
 
         public static void VfmslA1(CodeGenContext context, uint encoding)
         {
-            InstDb22w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4 inst = new(encoding);
+            _ = new InstDb22w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4(encoding);
 
             throw new NotImplementedException();
         }
 
         public static void VfmslT1(CodeGenContext context, uint encoding)
         {
-            InstDb22w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4 inst = new(encoding);
+            _ = new InstDb22w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4(encoding);
 
             throw new NotImplementedException();
         }
 
         public static void VfmslSA1(CodeGenContext context, uint encoding)
         {
-            InstDb22w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4 inst = new(encoding);
+            _ = new InstDb22w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4(encoding);
 
             throw new NotImplementedException();
         }
 
         public static void VfmslST1(CodeGenContext context, uint encoding)
         {
-            InstDb22w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4 inst = new(encoding);
+            _ = new InstDb22w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4(encoding);
 
             throw new NotImplementedException();
         }
@@ -5624,28 +5624,28 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
 
         public static void VinsA1(CodeGenContext context, uint encoding)
         {
-            InstDb22w1Vdb12w4Mb5w1Vmb0w4 inst = new(encoding);
+            _ = new InstDb22w1Vdb12w4Mb5w1Vmb0w4(encoding);
 
             throw new NotImplementedException();
         }
 
         public static void VinsT1(CodeGenContext context, uint encoding)
         {
-            InstDb22w1Vdb12w4Mb5w1Vmb0w4 inst = new(encoding);
+            _ = new InstDb22w1Vdb12w4Mb5w1Vmb0w4(encoding);
 
             throw new NotImplementedException();
         }
 
         public static void VjcvtA1(CodeGenContext context, uint encoding)
         {
-            InstCondb28w4Db22w1Vdb12w4Mb5w1Vmb0w4 inst = new(encoding);
+            _ = new InstCondb28w4Db22w1Vdb12w4Mb5w1Vmb0w4(encoding);
 
             throw new NotImplementedException();
         }
 
         public static void VjcvtT1(CodeGenContext context, uint encoding)
         {
-            InstDb22w1Vdb12w4Mb5w1Vmb0w4 inst = new(encoding);
+            _ = new InstDb22w1Vdb12w4Mb5w1Vmb0w4(encoding);
 
             throw new NotImplementedException();
         }
@@ -6324,14 +6324,14 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
 
         public static void VmmlaA1(CodeGenContext context, uint encoding)
         {
-            InstDb22w1Vnb16w4Vdb12w4Nb7w1Mb5w1Vmb0w4 inst = new(encoding);
+            _ = new InstDb22w1Vnb16w4Vdb12w4Nb7w1Mb5w1Vmb0w4(encoding);
 
             throw new NotImplementedException();
         }
 
         public static void VmmlaT1(CodeGenContext context, uint encoding)
         {
-            InstDb22w1Vnb16w4Vdb12w4Nb7w1Mb5w1Vmb0w4 inst = new(encoding);
+            _ = new InstDb22w1Vnb16w4Vdb12w4Nb7w1Mb5w1Vmb0w4(encoding);
 
             throw new NotImplementedException();
         }
@@ -7672,28 +7672,28 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
 
         public static void VsdotA1(CodeGenContext context, uint encoding)
         {
-            InstDb22w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4 inst = new(encoding);
+            _ = new InstDb22w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4(encoding);
 
             throw new NotImplementedException();
         }
 
         public static void VsdotT1(CodeGenContext context, uint encoding)
         {
-            InstDb22w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4 inst = new(encoding);
+            _ = new InstDb22w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4(encoding);
 
             throw new NotImplementedException();
         }
 
         public static void VsdotSA1(CodeGenContext context, uint encoding)
         {
-            InstDb22w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4 inst = new(encoding);
+            _ = new InstDb22w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4(encoding);
 
             throw new NotImplementedException();
         }
 
         public static void VsdotST1(CodeGenContext context, uint encoding)
         {
-            InstDb22w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4 inst = new(encoding);
+            _ = new InstDb22w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4(encoding);
 
             throw new NotImplementedException();
         }
@@ -7812,14 +7812,14 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
 
         public static void VsmmlaA1(CodeGenContext context, uint encoding)
         {
-            InstDb22w1Vnb16w4Vdb12w4Nb7w1Mb5w1Vmb0w4 inst = new(encoding);
+            _ = new InstDb22w1Vnb16w4Vdb12w4Nb7w1Mb5w1Vmb0w4(encoding);
 
             throw new NotImplementedException();
         }
 
         public static void VsmmlaT1(CodeGenContext context, uint encoding)
         {
-            InstDb22w1Vnb16w4Vdb12w4Nb7w1Mb5w1Vmb0w4 inst = new(encoding);
+            _ = new InstDb22w1Vnb16w4Vdb12w4Nb7w1Mb5w1Vmb0w4(encoding);
 
             throw new NotImplementedException();
         }
@@ -8274,14 +8274,14 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
 
         public static void VsudotSA1(CodeGenContext context, uint encoding)
         {
-            InstDb22w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4 inst = new(encoding);
+            _ = new InstDb22w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4(encoding);
 
             throw new NotImplementedException();
         }
 
         public static void VsudotST1(CodeGenContext context, uint encoding)
         {
-            InstDb22w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4 inst = new(encoding);
+            _ = new InstDb22w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4(encoding);
 
             throw new NotImplementedException();
         }
@@ -8344,84 +8344,84 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
 
         public static void VudotA1(CodeGenContext context, uint encoding)
         {
-            InstDb22w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4 inst = new(encoding);
+            _ = new InstDb22w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4(encoding);
 
             throw new NotImplementedException();
         }
 
         public static void VudotT1(CodeGenContext context, uint encoding)
         {
-            InstDb22w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4 inst = new(encoding);
+            _ = new InstDb22w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4(encoding);
 
             throw new NotImplementedException();
         }
 
         public static void VudotSA1(CodeGenContext context, uint encoding)
         {
-            InstDb22w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4 inst = new(encoding);
+            _ = new InstDb22w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4(encoding);
 
             throw new NotImplementedException();
         }
 
         public static void VudotST1(CodeGenContext context, uint encoding)
         {
-            InstDb22w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4 inst = new(encoding);
+            _ = new InstDb22w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4(encoding);
 
             throw new NotImplementedException();
         }
 
         public static void VummlaA1(CodeGenContext context, uint encoding)
         {
-            InstDb22w1Vnb16w4Vdb12w4Nb7w1Mb5w1Vmb0w4 inst = new(encoding);
+            _ = new InstDb22w1Vnb16w4Vdb12w4Nb7w1Mb5w1Vmb0w4(encoding);
 
             throw new NotImplementedException();
         }
 
         public static void VummlaT1(CodeGenContext context, uint encoding)
         {
-            InstDb22w1Vnb16w4Vdb12w4Nb7w1Mb5w1Vmb0w4 inst = new(encoding);
+            _ = new InstDb22w1Vnb16w4Vdb12w4Nb7w1Mb5w1Vmb0w4(encoding);
 
             throw new NotImplementedException();
         }
 
         public static void VusdotA1(CodeGenContext context, uint encoding)
         {
-            InstDb22w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4 inst = new(encoding);
+            _ = new InstDb22w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4(encoding);
 
             throw new NotImplementedException();
         }
 
         public static void VusdotT1(CodeGenContext context, uint encoding)
         {
-            InstDb22w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4 inst = new(encoding);
+            _ = new InstDb22w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4(encoding);
 
             throw new NotImplementedException();
         }
 
         public static void VusdotSA1(CodeGenContext context, uint encoding)
         {
-            InstDb22w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4 inst = new(encoding);
+            _ = new InstDb22w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4(encoding);
 
             throw new NotImplementedException();
         }
 
         public static void VusdotST1(CodeGenContext context, uint encoding)
         {
-            InstDb22w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4 inst = new(encoding);
+            _ = new InstDb22w1Vnb16w4Vdb12w4Nb7w1Qb6w1Mb5w1Vmb0w4(encoding);
 
             throw new NotImplementedException();
         }
 
         public static void VusmmlaA1(CodeGenContext context, uint encoding)
         {
-            InstDb22w1Vnb16w4Vdb12w4Nb7w1Mb5w1Vmb0w4 inst = new(encoding);
+            _ = new InstDb22w1Vnb16w4Vdb12w4Nb7w1Mb5w1Vmb0w4(encoding);
 
             throw new NotImplementedException();
         }
 
         public static void VusmmlaT1(CodeGenContext context, uint encoding)
         {
-            InstDb22w1Vnb16w4Vdb12w4Nb7w1Mb5w1Vmb0w4 inst = new(encoding);
+            _ = new InstDb22w1Vnb16w4Vdb12w4Nb7w1Mb5w1Vmb0w4(encoding);
 
             throw new NotImplementedException();
         }
@@ -8499,4 +8499,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
             context.Arm64Assembler.Yield();
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm32/Target/Arm64/InstEmitAbsDiff.cs

@@ -84,4 +84,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
             context.Arm64Assembler.Eor(value, tempRegister.Operand, value, ArmShiftType.Asr, 31);
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm32/Target/Arm64/InstEmitAlu.cs

@@ -1102,4 +1102,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
             context.Arm64Assembler.Eors(tempRegister.Operand, rnOperand, rmOperand);
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm32/Target/Arm64/InstEmitBit.cs

@@ -100,4 +100,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
             context.Arm64Assembler.Ubfx(rdOperand, rnOperand, (int)lsb, (int)widthMinus1 + 1);
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm32/Target/Arm64/InstEmitCommon.cs

@@ -260,4 +260,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
             return low1 | (high4 << 1);
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm32/Target/Arm64/InstEmitCrc32.cs

@@ -23,4 +23,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
             context.Arm64Assembler.Crc32c(rdOperand, rnOperand, rmOperand, Math.Min(2, sz));
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm32/Target/Arm64/InstEmitDivide.cs

@@ -22,4 +22,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
             context.Arm64Assembler.Udiv(rdOperand, rnOperand, rmOperand);
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm32/Target/Arm64/InstEmitExtension.cs

@@ -188,4 +188,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
             context.Arm64Assembler.Orr(rd, tempD2.Operand, tempD.Operand, ArmShiftType.Lsl, 16);
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm32/Target/Arm64/InstEmitFlow.cs

@@ -253,4 +253,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
             return new Operand(register, RegisterType.Integer, type);
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm32/Target/Arm64/InstEmitGE.cs

@@ -262,4 +262,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
             context.Arm64Assembler.Ubfx(flags, flags, 16, 4);
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm32/Target/Arm64/InstEmitHalve.cs

@@ -175,4 +175,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
             }
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm32/Target/Arm64/InstEmitMemory.cs

@@ -1150,4 +1150,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
             }
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm32/Target/Arm64/InstEmitMove.cs

@@ -347,4 +347,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
             context.Arm64Assembler.Ror(rdOperand, rdOperand, InstEmitCommon.Const(16));
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm32/Target/Arm64/InstEmitMultiply.cs

@@ -600,4 +600,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
             context.CodeWriter.WriteInstructionAt(branchIndex, context.CodeWriter.ReadInstructionAt(branchIndex) | (uint)((delta & 0x7ffff) << 5));
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm32/Target/Arm64/InstEmitNeonArithmetic.cs

@@ -341,4 +341,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
             InstEmitNeonCommon.EmitVectorBinaryWide(context, rd, rn, rm, size, u ? context.Arm64Assembler.Usubw : context.Arm64Assembler.Ssubw);
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm32/Target/Arm64/InstEmitNeonBit.cs

@@ -32,4 +32,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
             InstEmitNeonCommon.EmitVectorUnary(context, rd, rm, size, q, context.Arm64Assembler.Rev64);
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm32/Target/Arm64/InstEmitNeonCommon.cs

@@ -363,7 +363,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
             }
         }
 
-        public static void EmitVectorUnary(CodeGenContext context, uint rd, uint rm, uint size, uint q, Action<Operand,  Operand, uint, uint> action)
+        public static void EmitVectorUnary(CodeGenContext context, uint rd, uint rm, uint size, uint q, Action<Operand, Operand, uint, uint> action)
         {
             Debug.Assert(size < 3);
 
@@ -1510,4 +1510,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
             return registerAllocator.AllocateTempSimdRegisterScoped();
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm32/Target/Arm64/InstEmitNeonCompare.cs

@@ -123,4 +123,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
             InstEmitNeonCommon.EmitVectorBinary(context, rd, rn, rm, size, q, context.Arm64Assembler.CmtstV, context.Arm64Assembler.CmtstS);
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm32/Target/Arm64/InstEmitNeonConvert.cs

@@ -134,4 +134,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
             }
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm32/Target/Arm64/InstEmitNeonCrypto.cs

@@ -40,4 +40,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
             InstEmitNeonCommon.EmitVectorUnary(context, rd, rm, context.Arm64Assembler.Aesmc);
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm32/Target/Arm64/InstEmitNeonHash.cs

@@ -94,4 +94,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
             InstEmitNeonCommon.EmitVectorBinary(context, rd, rn, rm, context.Arm64Assembler.Sha256su1);
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm32/Target/Arm64/InstEmitNeonLogical.cs

@@ -76,4 +76,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
             }
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm32/Target/Arm64/InstEmitNeonMemory.cs

@@ -793,4 +793,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
             }
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm32/Target/Arm64/InstEmitNeonMove.cs

@@ -662,4 +662,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
             }
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm32/Target/Arm64/InstEmitNeonRound.cs

@@ -102,4 +102,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
             InstEmitNeonCommon.EmitVectorUnaryAnyF(context, rd, rm, size, q, context.Arm64Assembler.FrintzSingleAndDouble, context.Arm64Assembler.FrintzHalf);
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm32/Target/Arm64/InstEmitNeonSaturate.cs

@@ -202,4 +202,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
                 u ? context.Arm64Assembler.UqsubS : context.Arm64Assembler.SqsubS);
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm32/Target/Arm64/InstEmitNeonShift.cs

@@ -116,7 +116,8 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
 
         public static uint GetShiftRight(uint imm6, uint size)
         {
-            return (size == 3 ? 64u : (16u << (int)size)) - imm6;;
+            return (size == 3 ? 64u : (16u << (int)size)) - imm6;
+            ;
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm32/Target/Arm64/InstEmitNeonSystem.cs

@@ -74,4 +74,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
             }
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm32/Target/Arm64/InstEmitSaturate.cs

@@ -449,4 +449,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
             context.Arm64Assembler.StrRiUn(tempRegister.Operand, ctx, NativeContextOffsets.FlagsBaseOffset);
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm32/Target/Arm64/InstEmitSystem.cs

@@ -645,4 +645,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
             return new Operand(register, RegisterType.Integer, type);
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm32/Target/Arm64/InstEmitVfpArithmetic.cs

@@ -92,4 +92,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
             InstEmitNeonCommon.EmitScalarBinaryF(context, rd, rn, rm, size, context.Arm64Assembler.FsubFloat);
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm32/Target/Arm64/InstEmitVfpCompare.cs

@@ -130,4 +130,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
             return true;
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm32/Target/Arm64/InstEmitVfpConvert.cs

@@ -302,4 +302,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
             }
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm32/Target/Arm64/InstEmitVfpMove.cs

@@ -19,4 +19,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
             InstEmitNeonCommon.InsertResult(context, tempRegister.Operand, rd, singleRegs);
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm32/Target/Arm64/InstEmitVfpRound.cs

@@ -37,4 +37,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
             InstEmitNeonCommon.EmitScalarUnaryF(context, rd, rm, size, context.Arm64Assembler.FrintzFloat);
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm64/A64Compiler.cs

@@ -1,6 +1,6 @@
 using ARMeilleure.Common;
-using Ryujinx.Cpu.LightningJit.Arm64.Target.Arm64;
 using ARMeilleure.Memory;
+using Ryujinx.Cpu.LightningJit.Arm64.Target.Arm64;
 using System;
 using System.Runtime.InteropServices;
 
@@ -26,4 +26,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm64
             }
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm64/Block.cs

@@ -135,4 +135,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm64
             return lastInstructionName.IsCall() || lastInstructionName.IsException();
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm64/ImmUtils.cs

@@ -17,4 +17,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm64
             return (int)(encoding << 6) >> 4;
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm64/InstFlags.cs

@@ -105,4 +105,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm64
         RtSeqRnSPFpSimd = RtSeq | RnSP | FpSimd,
         RtSeqRnSPRmFpSimdMemWBack = RtSeq | RnSP | Rm | FpSimd | MemWBack,
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm64/InstInfo.cs

@@ -19,4 +19,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm64
             RegisterUse = registerUse;
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm64/InstName.cs

@@ -1131,4 +1131,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm64
             return false;
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm64/MultiBlock.cs

@@ -61,4 +61,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm64
             }
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm64/RegisterAllocator.cs

@@ -151,4 +151,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm64
             mask &= ~(1u << index);
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm64/RegisterUtils.cs

@@ -492,4 +492,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm64
             return index == ZrIndex ? SpecialZrIndex : index;
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm64/Target/Arm64/Compiler.cs

@@ -1,8 +1,8 @@
 using ARMeilleure.Common;
+using ARMeilleure.Memory;
 using Ryujinx.Cpu.LightningJit.CodeGen;
 using Ryujinx.Cpu.LightningJit.CodeGen.Arm64;
 using Ryujinx.Cpu.LightningJit.Graph;
-using ARMeilleure.Memory;
 using System;
 using System.Collections.Generic;
 using System.Diagnostics;

src/Ryujinx.Cpu/LightningJit/Arm64/Target/Arm64/Decoder.cs

@@ -1,5 +1,5 @@
-using Ryujinx.Cpu.LightningJit.Graph;
 using ARMeilleure.Memory;
+using Ryujinx.Cpu.LightningJit.Graph;
 using System.Collections.Generic;
 using System.Diagnostics;
 using System.Numerics;
@@ -381,4 +381,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm64.Target.Arm64
             return BitOperations.PopCount(~(gprUseMask | RegisterUtils.ReservedRegsMask));
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm64/Target/Arm64/InstEmitMemory.cs

@@ -569,4 +569,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm64.Target.Arm64
             return (int)(encoding >> 10) & 0xfff;
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm64/Target/Arm64/InstEmitSystem.cs

@@ -602,4 +602,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm64.Target.Arm64
             return new Operand(register, RegisterType.Integer, type);
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Arm64/Target/Arm64/InstTable.cs

@@ -1602,4 +1602,4 @@ namespace Ryujinx.Cpu.LightningJit.Arm64.Target.Arm64
             return new(InstName.UdfPermUndef, InstFlags.None, AddressForm.None);
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/CodeGen/Arm64/AbiConstants.cs

@@ -12,4 +12,4 @@ namespace Ryujinx.Cpu.LightningJit.CodeGen.Arm64
         public const uint GprCalleeSavedRegsMask = 0x1ff80000; // X19 to X28
         public const uint FpSimdCalleeSavedRegsMask = 0xff00; // D8 to D15
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/CodeGen/Arm64/Assembler.cs

@@ -21,7 +21,7 @@ namespace Ryujinx.Cpu.LightningJit.CodeGen.Arm64
             public bool HasTarget;
         }
 
-        private List<LabelState> _labels;
+        private readonly List<LabelState> _labels;
 
         public Assembler(CodeWriter writer)
         {
@@ -29,7 +29,7 @@ namespace Ryujinx.Cpu.LightningJit.CodeGen.Arm64
             _labels = new List<LabelState>();
         }
 
-        public Operand CreateLabel()
+        public readonly Operand CreateLabel()
         {
             int labelIndex = _labels.Count;
             _labels.Add(new LabelState());
@@ -37,7 +37,7 @@ namespace Ryujinx.Cpu.LightningJit.CodeGen.Arm64
             return new Operand(OperandKind.Label, OperandType.None, (ulong)labelIndex);
         }
 
-        public void MarkLabel(Operand label)
+        public readonly void MarkLabel(Operand label)
         {
             int targetIndex = _code.Count;
 
@@ -213,12 +213,12 @@ namespace Ryujinx.Cpu.LightningJit.CodeGen.Arm64
             WriteInstructionBitwiseAuto(0x1ac02800u, rd, rn, rm);
         }
 
-        public void B(int imm)
+        public readonly void B(int imm)
         {
             WriteUInt32(0x14000000u | EncodeSImm26_2(imm));
         }
 
-        public void B(ArmCondition condition, int imm)
+        public readonly void B(ArmCondition condition, int imm)
         {
             WriteUInt32(0x54000000u | (uint)condition | (EncodeSImm19_2(imm) << 5));
         }
@@ -263,17 +263,17 @@ namespace Ryujinx.Cpu.LightningJit.CodeGen.Arm64
             WriteInstructionAuto(0x6a200000u, rd, rn, rm, shiftType, shiftAmount);
         }
 
-        public void Blr(Operand rn)
+        public readonly void Blr(Operand rn)
         {
             WriteUInt32(0xd63f0000u | (EncodeReg(rn) << 5));
         }
 
-        public void Br(Operand rn)
+        public readonly void Br(Operand rn)
         {
             WriteUInt32(0xd61f0000u | (EncodeReg(rn) << 5));
         }
 
-        public void Brk()
+        public readonly void Brk()
         {
             WriteUInt32(0xd4200000u);
         }
@@ -300,7 +300,7 @@ namespace Ryujinx.Cpu.LightningJit.CodeGen.Arm64
             WriteInstructionRm16(0x1ac05000u | (sz << 10), rd, rn, rm);
         }
 
-        public void Clrex(int crm = 15)
+        public readonly void Clrex(int crm = 15)
         {
             WriteUInt32(0xd503305fu | (EncodeUImm4(crm) << 8));
         }
@@ -330,7 +330,7 @@ namespace Ryujinx.Cpu.LightningJit.CodeGen.Arm64
             Subs(new Operand(ZrRegister, RegisterType.Integer, rn.Type), rn, rm, shiftType, shiftAmount);
         }
 
-        public void Csdb()
+        public readonly void Csdb()
         {
             WriteUInt32(0xd503229fu);
         }
@@ -351,12 +351,12 @@ namespace Ryujinx.Cpu.LightningJit.CodeGen.Arm64
             WriteInstructionBitwiseAuto(0x1a800400u | ((uint)condition << 12), rd, rn, rm);
         }
 
-        public void Dmb(uint option)
+        public readonly void Dmb(uint option)
         {
             WriteUInt32(0xd50330bfu | (option << 8));
         }
 
-        public void Dsb(uint option)
+        public readonly void Dsb(uint option)
         {
             WriteUInt32(0xd503309fu | (option << 8));
         }
@@ -382,7 +382,7 @@ namespace Ryujinx.Cpu.LightningJit.CodeGen.Arm64
             Tst(rd, rd);
         }
 
-        public void Esb()
+        public readonly void Esb()
         {
             WriteUInt32(0xd503221fu);
         }
@@ -393,7 +393,7 @@ namespace Ryujinx.Cpu.LightningJit.CodeGen.Arm64
             WriteInstructionBitwiseAuto(0x13800000u | n | (EncodeUImm6(imms) << 10), rd, rn, rm);
         }
 
-        public void Isb(uint option)
+        public readonly void Isb(uint option)
         {
             WriteUInt32(0xd50330dfu | (option << 8));
         }
@@ -882,7 +882,7 @@ namespace Ryujinx.Cpu.LightningJit.CodeGen.Arm64
             Ret(new Operand(30, RegisterType.Integer, OperandType.I64));
         }
 
-        public void Ret(Operand rn)
+        public readonly void Ret(Operand rn)
         {
             WriteUInt32(0xd65f0000u | (EncodeReg(rn) << 5));
         }
@@ -949,12 +949,12 @@ namespace Ryujinx.Cpu.LightningJit.CodeGen.Arm64
             WriteInstructionRm16Auto(0x1ac00c00u, rd, rn, rm);
         }
 
-        public void Sev()
+        public readonly void Sev()
         {
             WriteUInt32(0xd503209fu);
         }
 
-        public void Sevl()
+        public readonly void Sevl()
         {
             WriteUInt32(0xd50320bfu);
         }
@@ -1162,7 +1162,7 @@ namespace Ryujinx.Cpu.LightningJit.CodeGen.Arm64
             Sbfm(rd, rn, 0, 31);
         }
 
-        public void Tsb()
+        public readonly void Tsb()
         {
             WriteUInt32(0xd503225fu);
         }
@@ -4292,12 +4292,12 @@ namespace Ryujinx.Cpu.LightningJit.CodeGen.Arm64
             WriteInstructionRm16(0x0e005800u | (size << 22) | (q << 30), rd, rn, rm);
         }
 
-        public void Wfe()
+        public readonly void Wfe()
         {
             WriteUInt32(0xd503205fu);
         }
 
-        public void Wfi()
+        public readonly void Wfi()
         {
             WriteUInt32(0xd503207fu);
         }
@@ -4312,7 +4312,7 @@ namespace Ryujinx.Cpu.LightningJit.CodeGen.Arm64
             WriteInstruction(0x0e212800u | (size << 22) | (q << 30), rd, rn);
         }
 
-        public void Yield()
+        public readonly void Yield()
         {
             WriteUInt32(0xd503203fu);
         }
@@ -4498,22 +4498,22 @@ namespace Ryujinx.Cpu.LightningJit.CodeGen.Arm64
             WriteInstruction(instruction, rd, rn, rm, ra);
         }
 
-        public void WriteInstruction(uint instruction, Operand rd)
+        public readonly void WriteInstruction(uint instruction, Operand rd)
         {
             WriteUInt32(instruction | EncodeReg(rd));
         }
 
-        public void WriteInstruction(uint instruction, Operand rd, Operand rn)
+        public readonly void WriteInstruction(uint instruction, Operand rd, Operand rn)
         {
             WriteUInt32(instruction | EncodeReg(rd) | (EncodeReg(rn) << 5));
         }
 
-        public void WriteInstruction(uint instruction, Operand rd, Operand rn, Operand rm)
+        public readonly void WriteInstruction(uint instruction, Operand rd, Operand rn, Operand rm)
         {
             WriteUInt32(instruction | EncodeReg(rd) | (EncodeReg(rn) << 5) | (EncodeReg(rm) << 10));
         }
 
-        public void WriteInstruction(uint instruction, Operand rd, Operand rn, Operand rm, Operand ra)
+        public readonly void WriteInstruction(uint instruction, Operand rd, Operand rn, Operand rm, Operand ra)
         {
             WriteUInt32(instruction | EncodeReg(rd) | (EncodeReg(rn) << 5) | (EncodeReg(ra) << 10) | (EncodeReg(rm) << 16));
         }
@@ -4528,12 +4528,12 @@ namespace Ryujinx.Cpu.LightningJit.CodeGen.Arm64
             WriteInstructionRm16(instruction, rd, rn, rm);
         }
 
-        public void WriteInstructionRm16(uint instruction, Operand rn, Operand rm)
+        public readonly void WriteInstructionRm16(uint instruction, Operand rn, Operand rm)
         {
             WriteUInt32(instruction | (EncodeReg(rn) << 5) | (EncodeReg(rm) << 16));
         }
 
-        public void WriteInstructionRm16(uint instruction, Operand rd, Operand rn, Operand rm)
+        public readonly void WriteInstructionRm16(uint instruction, Operand rd, Operand rn, Operand rm)
         {
             WriteUInt32(instruction | EncodeReg(rd) | (EncodeReg(rn) << 5) | (EncodeReg(rm) << 16));
         }

src/Ryujinx.Cpu/LightningJit/CodeGen/Arm64/RegisterSaveRestore.cs

@@ -221,7 +221,7 @@ namespace Ryujinx.Cpu.LightningJit.CodeGen.Arm64
                     {
                         asm.LdrRiUn(Register(reg, type), Register(Assembler.SpRegister), offset);
                     }
-                    else  if (calleeSaveRegionSize < Encodable9BitsOffsetLimit)
+                    else if (calleeSaveRegionSize < Encodable9BitsOffsetLimit)
                     {
                         asm.LdrRiPost(Register(reg, type), Register(Assembler.SpRegister), calleeSaveRegionSize);
                     }
@@ -249,4 +249,4 @@ namespace Ryujinx.Cpu.LightningJit.CodeGen.Arm64
             return (value + 0xf) & ~0xf;
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/CodeGen/Arm64/TailMerger.cs

@@ -117,4 +117,4 @@ namespace Ryujinx.Cpu.LightningJit.CodeGen.Arm64
             return (int)(encoding << 6) >> 4;
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/CodeGen/Operand.cs

@@ -2,7 +2,7 @@ using System.Diagnostics;
 
 namespace Ryujinx.Cpu.LightningJit.CodeGen
 {
-    struct Operand
+    readonly struct Operand
     {
         public readonly OperandKind Kind { get; }
         public readonly OperandType Type { get; }

src/Ryujinx.Cpu/LightningJit/CodeWriter.cs

@@ -58,4 +58,4 @@ namespace Ryujinx.Cpu.LightningJit
             return MemoryMarshal.Cast<uint, byte>(AsSpan());
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/CompiledFunction.cs

@@ -2,7 +2,7 @@ using System;
 
 namespace Ryujinx.Cpu.LightningJit
 {
-    ref struct CompiledFunction
+    readonly ref struct CompiledFunction
     {
         public readonly ReadOnlySpan<byte> Code;
         public readonly int GuestCodeLength;
@@ -13,4 +13,4 @@ namespace Ryujinx.Cpu.LightningJit
             GuestCodeLength = guestCodeLength;
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/CpuPreset.cs

@@ -11,4 +11,4 @@ namespace Ryujinx.Cpu.LightningJit
             Features = features;
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/CpuPresets.cs

@@ -10,4 +10,4 @@ namespace Ryujinx.Cpu.LightningJit
             IsaFeature.FeatSha256 |
             IsaFeature.FeatPmull);
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Graph/DataFlow.cs

@@ -168,4 +168,4 @@ namespace Ryujinx.Cpu.LightningJit.Graph
             return -1;
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Graph/IBlock.cs

@@ -14,4 +14,4 @@ namespace Ryujinx.Cpu.LightningJit.Graph
         bool EndsWithContextLoad();
         bool EndsWithContextStore();
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Graph/IBlockList.cs

@@ -6,4 +6,4 @@ namespace Ryujinx.Cpu.LightningJit.Graph
 
         IBlock this[int index] { get; }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Graph/RegisterMask.cs

@@ -57,4 +57,4 @@ namespace Ryujinx.Cpu.LightningJit.Graph
             return HashCode.Combine(GprMask, FpSimdMask, PStateMask);
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Graph/RegisterUse.cs

@@ -21,4 +21,4 @@ namespace Ryujinx.Cpu.LightningJit.Graph
         {
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/IsaFeature.cs

@@ -62,4 +62,4 @@ namespace Ryujinx.Cpu.LightningJit
         FeatWfxt = 1UL << 53,
         FeatXs = 1UL << 54,
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/IsaVersion.cs

@@ -14,4 +14,4 @@ namespace Ryujinx.Cpu.LightningJit
         v88,
         v89,
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/LightningJitCpuContext.cs

@@ -1,4 +1,4 @@
-using ARMeilleure.Memory;
+using ARMeilleure.Memory;
 using Ryujinx.Cpu.Jit;
 using Ryujinx.Cpu.LightningJit.State;
 

src/Ryujinx.Cpu/LightningJit/NativeContextOffsets.cs

@@ -14,4 +14,4 @@ namespace Ryujinx.Cpu.LightningJit
         public static int CounterOffset => NativeContext.GetCounterOffset();
         public static int DispatchAddressOffset => NativeContext.GetDispatchAddressOffset();
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Table/IInstInfo.cs

@@ -9,4 +9,4 @@ namespace Ryujinx.Cpu.LightningJit.Table
 
         bool IsConstrained(uint encoding);
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Table/InstEncoding.cs

@@ -11,4 +11,4 @@ namespace Ryujinx.Cpu.LightningJit.Table
             EncodingMask = encodingMask;
         }
     }
-}
+}

src/Ryujinx.Cpu/LightningJit/Table/InstTableLevel.cs

@@ -93,4 +93,4 @@ namespace Ryujinx.Cpu.LightningJit.Table
             }
         }
     }
-}
+}

src/Ryujinx.HLE/HOS/ArmProcessContext.cs

@@ -1,4 +1,4 @@
-using ARMeilleure.Memory;
+using ARMeilleure.Memory;
 using Ryujinx.Cpu;
 using Ryujinx.Graphics.Gpu;
 using Ryujinx.HLE.HOS.Kernel.Process;

src/Ryujinx.HLE/HOS/ArmProcessContextFactory.cs

@@ -1,4 +1,4 @@
-using Ryujinx.Common.Configuration;
+using Ryujinx.Common.Configuration;
 using Ryujinx.Common.Logging;
 using Ryujinx.Cpu;
 using Ryujinx.Cpu.AppleHv;