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guozanhua/MeloNX
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Code Pull Requests Activity
35 Commits 19 Branches 10 Tags
Commit Graph

7 Commits

Author SHA1 Message Date
gdkchan
7d11a146c0 Generate CIL for SCVTF (vector), add undefined encodings for some instructions 2018-02-12 00:37:20 -03:00
gdkchan
55743c0cba Only throw undefined instruction exception at execution, not at translation stage 2018-02-10 14:20:46 -03:00
gdkchan
9063766ed6 Add BRK instruction, fix wrong namespace on one of Am interfaces, and disable Debug/Trace logs by default 2018-02-10 10:24:16 -03:00
gdkchan
ccc9ce1908 Move a few more SIMD instructions to emit CIL directly instead of a method call 2018-02-09 17:14:47 -03:00
gdkchan
6a3aa6cd88 Add FVCTZS (fixed point variant) and LD1 (single structure variant) instructions 2018-02-09 00:26:20 -03:00
gdkchan
79f028e410 Add FMADD and FMSUB instructions 2018-02-07 20:07:16 -03:00
gdkchan
b7e1d9930d aloha 2018-02-04 20:08:20 -03:00
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